Rfm69WrSpi(REG_RSSITHRESH, 0xFF) // permanently trigger I'm beginning to suspect this is the fastest possible, there certainly appears to be a limit on the maximum rate at which the RSSI register updates and it is in the same order of 2.5ms. I'm not convinced it really is 1ms, if you restart by switching to STANDBY and then to RX mode (which waits for MODEREADY) the cycle time will drop to 2.5ms with no delays. Here's the code I'm using to sample at 1ms resolution. This may have implications for using unlimited packet length mode and reading the RSSI assiciated with it.ģ) Waiting for an RSSI interrupt, reading the RSSI register and restarting the receiver appears to be the most reliable. When using variable length mode a PayloadReady is generated, and the correct value is put in the RSSI register at that point. If a packet starts to be received it appears the correct value is sometimes not put into the RSSI register. Once you empty the FIFO, or take out of RX mode, the RSSI register will start to change again.Ģ) My experiments with unlimited packet length seem to imply a strangeness with the RSSI levels reported. 1) If you are receiving genuine packets you should wait for the PayloadReady interrupt and read the RSSI immediately before emptying the FIFO because PayloadReady freezes the RSSI register.
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